Low latency BCH decoder using the affine polynomial over the finite field
166 viewsDOI:
https://doi.org/10.54939/1859-1043.j.mst.CSCE6.2022.105-113Keywords:
Error-correcting code; finite field; affine polynomial; BCH code.Abstract
The paper proposes a low latency BCH decoder with low complexity using parallel computation and simplifying locating errors by finding the roots of the affine polynomial over finite fields. The proposed design can be implemented on low-cost hardware platforms while applicable in very low latency information systems.
References
[1]. Bijan Ansari, “Finite field arithmetic and its application in cryptography,” Dissertation for the degree Doctor of Philosophy in Electrical Engineering, University of California, Los Angeles (2012).
[2]. Elwyn R. Berlekamp, “Algebraic Coding Theory (Revised Edition),” World Scientific Publishing Co. Pte. Ltd. (2015). DOI: https://doi.org/10.1142/9407
[3]. F. J. MacWilliams, N. J. A. Sloane, “The theory of error correction codes,” Elselvier (1977).
[4]. Tood K. Moon, “Error correction coding: Mathematical methods and algorithms,” John & sons, Inc. (2005).
[5]. K. Deerganghao, “Channel coding technique for wireless communications,” Springer, (2015). DOI: https://doi.org/10.1007/978-81-322-2292-7
[6]. Fedorenko S. V., Trifonov P. V. “Finding roots of polynomials over finite fields,” IEEE Transactions on Communications, Vol. 50, Issue 11, pp. 1709–1711, (2002). DOI: https://doi.org/10.1109/TCOMM.2002.805269
[7]. J. Fredenberger, “A configurable Bose Chauhuri Hocquenghem codec architecture for flash controller applications,” Journal of circuits, systems and computer, Vol. 23, No. 02, (2013). DOI: https://doi.org/10.1142/S0218126614500194
[8]. J. Fredenberger, B. N. Bailon, M. Shafies, “Reduced complexity hard and soft decoding of BCH codes with application in concatenated codes,” EIT circuit, devices and systems, pp. 284-296, (2021). DOI: https://doi.org/10.1049/cds2.12026
[9]. Johann Groβschadl, “A low-power bit serial multiplier for finite fields GF(2m),” 34th IEEE International symposium on ciruits and system, vol. IV, pp. 37-40, (2001).
[10]. H. Wu, “Montrogomery multiplier and squarer in GF(2m)” Lecture notes in computer science, (2000).
[11]. Lin Shu, Costello, Daniel J., “Error correcting codes,” Prentice-Hall, Inc. (2004).
[12]. D. Strukov, “The area and latency tradeoffs of binary bit-parallel BCH decoders for prospective nano electronic memories,” ACSSC Papers, (2007). DOI: https://doi.org/10.1109/ACSSC.2006.354942
