Low latency BCH decoder using the affine polynomial over the finite field

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Authors

  • Pham Khac Hoan (Corresponding Author) Military Technical Academy
  • Nguyen Tien Thai Military Technical Academy
  • Vu Son Ha Academy of Military Science and Technology

DOI:

https://doi.org/10.54939/1859-1043.j.mst.CSCE6.2022.105-113

Keywords:

Error-correcting code; finite field; affine polynomial; BCH code.

Abstract

The paper proposes a low latency BCH decoder with low complexity using parallel computation and simplifying locating errors by finding the roots of the affine polynomial over finite fields. The proposed design can be implemented on low-cost hardware platforms while applicable in very low latency information systems.

References

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Published

30-12-2022

How to Cite

Pham Khac Hoan, Nguyen Tien Thai, and Vu Son HaVu Son Ha. “Low Latency BCH Decoder Using the Affine Polynomial over the Finite Field”. Journal of Military Science and Technology, no. CSCE6, Dec. 2022, pp. 105-13, doi:10.54939/1859-1043.j.mst.CSCE6.2022.105-113.

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